1. Field of the Invention
The present invention relates to latch circuits, and, more particularly, to a latching dynamic sense amplifier circuit ("latching sense amp" hereinafter).
2. Background Information
Latching sense amp circuits are used in a variety of situations. For example, such a circuit may be useful as an input buffer, such as an input buffer for a signal provided to or by a memory, such as a static random access memory cell (SRAM) or dynamic random access memory (DRAM), for example. Such circuits are desirable because the signal provided is amplified and then stored as a binary digital signal or bit, which may then be processed.
Of course, such circuits may be employed in a variety of other situations as well. Conventional latching dynamic sense amp circuits, however, have a variety of disadvantages. For example, by drawing current from the input pins, such circuits may degrade performance by affecting the input signal, such as provided from a memory. In addition, typically such circuits employ three pulses for operation, a precharge pulse, a sample pulse, and a capture pulse. In contrast with memory applications, successfully coordinating these three pulses in a single cycle may be inconvenient for chip-to-chip communications, particularly in an environment in which it is not known in advance when the signal will be transferred. A third disadvantage of such conventional circuits is the application of three pulses for circuit operation. Typically, these three pulses may employ on the order of 900 pico-seconds of time. However, if signals being applied arrive with a relatively high data rate, this amount of time may be a disadvantage. Such conventional latching sense amps may also not be desirable for use in connection with relatively noisy signals because voltage spikes above the positive supply voltage or below the negative supply voltage may degrade performance where the sampling mechanism is implemented by a transmission gate. A need, therefore, exists for a latching sense amp that overcomes or reduces the foregoing disadvantages.